LFSR Calculator

LFSR Calculator

Simulate a Linear Feedback Shift Register for pseudorandom number generation, stream ciphers, and error detection. Essential for cryptography and digital circuit design.

Last updated: March 2026 | By Patchworkr Team

Simulate LFSR

Comma-separated (e.g., 4,3)

What is an LFSR?

A Linear Feedback Shift Register (LFSR) is a shift register whose input bit is a linear function of its previous state. The most commonly used linear function is exclusive-OR (XOR). LFSRs are widely used in cryptography, pseudorandom number generation, and error detection codes.

The register consists of a series of bits (the state) and tap positions that determine which bits are XORed together to produce the feedback bit. On each clock cycle, all bits shift right by one position, and the feedback bit is inserted at the leftmost position.

With properly chosen tap positions, an n-bit LFSR can cycle through all 2ⁿ - 1 possible non-zero states before repeating (called a maximal-length or maximum-length LFSR). This property makes them excellent for generating pseudorandom sequences.

How LFSRs Work

LFSR Operation

Step 1: XOR all bits at tap positions
Step 2: Shift all bits right by one position
Step 3: Insert XOR result at leftmost position
Output: Rightmost bit (before shifting)

Maximal-Length Tap Positions

Common tap positions for maximum-length LFSRs:

4-bit: [4,3]
5-bit: [5,3]
6-bit: [6,5]
8-bit: [8,6,5,4]
16-bit: [16,15,13,4]

Example: 4-bit LFSR

Seed: 1011, Taps: [4,3]

Initial:
1011
Step 1:
XOR positions 4 and 3:
Bit[4]=1, Bit[3]=0 → 1 XOR 0 = 1
Output bit[1]=1, shift right, insert 1:
1101
Step 2:
XOR positions 4 and 3:
Bit[4]=1, Bit[3]=0 → 1 XOR 0 = 1
Output bit[1]=1, shift right, insert 1:
1110
Sequence:
After 15 steps (full cycle):
101110010011000
This 4-bit LFSR cycles through all 15 non-zero states (2⁴-1)

Frequently Asked Questions

What are LFSRs used for?

LFSRs are used in cryptography (stream ciphers), pseudorandom number generation, error detection codes (CRC), digital watermarking, GPS signal generation, and hardware testing. Their simplicity makes them ideal for hardware implementation.

Why can't the seed be all zeros?

If the LFSR starts with all zeros, it will remain stuck at zero forever since XORing zeros produces zero. The all-zero state is called the 'lock-up' state and must be avoided by choosing a non-zero seed.

What makes a tap position maximal?

Maximal-length tap positions ensure the LFSR cycles through all 2ⁿ-1 possible non-zero states before repeating. These tap positions correspond to primitive polynomials in Galois field theory. Not all tap combinations are maximal.

Are LFSRs cryptographically secure?

Standard LFSRs alone are NOT cryptographically secure. Their output is predictable from just 2n bits of output for an n-bit LFSR. However, they're used in combination with other techniques in secure systems like A5/1 (GSM) and E0 (Bluetooth).

How do I choose tap positions?

For maximal-length sequences, use published tables of primitive polynomials. For 4-bit use [4,3], 8-bit use [8,6,5,4], 16-bit use [16,15,13,4], etc. Random tap selection will likely not produce maximal-length sequences.

Can LFSRs be multiple bits wide?

Yes! LFSRs can be any bit width. Common sizes are 4, 8, 16, 32, and 64 bits. Larger LFSRs have longer periods (2ⁿ-1 states) and better statistical properties for pseudorandom generation.

What's the difference between Fibonacci and Galois LFSRs?

This calculator implements a Fibonacci LFSR where taps feed back to the input. Galois LFSRs have taps that affect multiple positions simultaneously. Both produce the same output sequence but differ in hardware implementation.

How do I verify my LFSR is maximal?

Run it for 2ⁿ-1 steps and verify all non-zero states appear exactly once. For a 4-bit LFSR, that's 15 unique states. If it repeats earlier or skips states, the tap positions aren't maximal.

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